Anti-Tamper Digital Clocks - An Overview
Anti-Tamper Digital Clocks - An Overview
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17. The equipment for detecting clock tampering as defined in claim fifteen, wherein the evaluate circuit is induced by a clock edge at an stop of the clock Appraise period of time.
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A different aspect of the creation could reside in an apparatus for detecting voltage tampering, comprising a circuit that gives a monotone signal, a plurality of resettable hold off line segments, and an Appraise circuit: The circuit supplies a monotone signal all through an Assess period of time. The plurality of resettable delay line segments delay the monotone sign to generate a respective get more info plurality of delayed monotone alerts.
an evaluate circuit, induced because of the clock, that works by using the plurality of delayed monotone indicators to detect a clock fault.
37. An apparatus for detecting voltage tampering, comprising: a circuit that provides a monotone sign in the course of an Examine period of time;
Disclosed is a method for detecting clock tampering. In the method a plurality of resettable hold off line segments are provided. Resettable delay line segments concerning a resettable hold off line section connected to a least hold off time in addition to a resettable delay line phase associated with a highest hold off time are Just about every connected to discretely rising delay occasions.
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In more in depth elements of the creation, the tactic could further more incorporate resetting the resettable delay line segments for the duration of a reset time frame.
Yet another aspect of the creation could reside in an equipment for detecting voltage tampering, comprising: usually means for offering a monotone signal all through an evaluate time; indicates for delaying the monotone sign utilizing a plurality of resettable delay line segments to create a respective plurality of delayed monotone signals getting discretely escalating hold off situations concerning a minimum amount delay time plus a greatest delay time; and usually means for utilizing the clock to bring about an Assess circuit that makes use of the plurality of delayed monotone signals to detect a voltage fault.
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